Design Verification Engineer

Responsibilities:? Strong verification experience with knowledge of SystemVerilog, UVM? System verification (C based) experience is a must.? Good knowledge of testplan creation and tracking.? Low-level programming experience including C and Assembler.? Experience with full verification flow including coverage closure.? Experience with ARM-based designs and/or ARM System Architectures? AXI, CHI protocol knowledge.About us:We are Semiconductors, and a Design and Test Engineering Service.A company providing End to End Solutions from Product Engineering, Software, Hardware,Wireless, Automotive and Embedded Solutions.We offer a unique combination of pre-silicon and post-silicon expertise to provide anefficient turnkey solution for silicon bring-up, spec to the product. With 2500+ employeesworldwide,We provide a one-stop-shop solution with full-fledged hardware and softwarecapabilities, including its advanced silicon and system testing labs. We offer a TurnkeyASIC Solution, from design to packaged parts. We have a global presence with office locations inthe United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan,Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.We offer highly competitive compensation and benefits along with an electric workenvironment to scale one’s intellect, skills and growth.