Design Verification Engineer

Company:  Stack Digital
Location: London
Closing Date: 08/11/2024
Hours: Full Time
Type: Permanent
Job Requirements / Description
Job Title: Design Verification Engineer Location: Remote (UK) Job Type: Contract (Inside IR35) Duration: 6+ Months Job Description: We are seeking a highly skilled Design Verification Engineer with over 10 years of experience to join our team. The ideal candidate will be responsible for writing test plans, defining test methodologies, and developing test benches to ensure the functional verification of SoCs and subsystems. ​​​​​​​ Key Responsibilities: Write and execute test plans and define test methodologies for design verification Develop SystemVerilog/UVM verification environments and test benches Create and run tests to meet functional and code coverage requirements, analyzing coverage gaps Conduct regression tests, debug failures, and file bug reports as necessary Verify CPU connectivity to IP blocks using ASM boot, C code, and GNU toolchain Provide verification reports demonstrating successful test execution on RTL Work with LPDDR memory controller integration and verification Utilize expertise in AXI, APB, and CHI protocols This role offers an exciting opportunity to work on cutting-edge design verification projects within a dynamic team environment. The successful candidate will play a crucial role in ensuring the quality and reliability of our digital designs through comprehensive verification processes.
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